TechXperience Summit

Shaping the future together

Wednesday, March 26 to Friday, March 28, 2025

Look forward with us to the first TechXperience Summit in 2025!

AP&S quality

Why do we offer this platform?

TechXperience Summit

The event provides a valuable platform for the exchange of information on semiconductor topics, as it gives experts, innovators and decision-makers from the industry the opportunity to discuss current trends, challenges and opportunities.

  • Presentations on technical and innovative topics by top-class speakers.
  • Innovative and international platform for the exchange of ideas, trends and visions for the semiconductor industry.
  • Communication on technical, innovative and forward-looking topics.
  • Insights into the production of AP&S wet process systems.

Agenda

Sharing knowledge, making contacts

Wednesday, March 26, 2025

Öventhütte (DER ÖSCHBERGHOF), Donaueschingen

19:00 "Get together" (incl. welcome greeting)

Thursday, March 27, 2025

Strawinsky Hall, Donauhallen, Donaueschingen

08:15 – 08:45 Registration
08:45 – 09:00 Welcome greeting
09:00 – 09:20 Jan Klinger
Fabmatics GmbH
"Automating Legacy Semiconductor Fabs - Lifespan Expansion Made in Saxony"
09:20 – 09:40 Dr. Niels Clausen
Fraunhofer Institute for Silicon Technology (ISIT)
"Dual-Purpose Spinscrubber System for Surface Cleaning and ALD Penetration Assessment in PowderMEMS process"

09:40 – 10:00 Dr. Simon Fichtner & Christopher Kutzner
Fraunhofer Institute for Silicon Technology (ISIT) & X-FAB Semiconductor Foundries AG
"Wet etching of AlScN films with high Sc-content for piezo-MEMS applications"
10:00 – 10:20 Gabriel Park
Levitronix GmbH
"Reducing Variations in Process Chamber Pressure by Actively Controlling Exhaust"
10:20 – 10:50 Break, networking & trade fair
10:50 – 11:10 Dr. Florian Schopper
Max Planck Society for the Advancement of Science e.V.
"Wet chemical spinetch tool for structuring, stripping and cleaning of doubleside polished silicon wafers"
11:10 – 11:30 Dr. Stefan Pieper
MKS | Atotech
"Electroless metallization for power semiconductor devices"
11:30 – 11:50 Dr. Anina Barth
MKS Instruments Germany GmbH
"Dissolved Gases - Cleaning and specialty applications in semiconductor manufacturing"
11:50 – 12:10 Dr. Andreas Möller
Nova Ltd
"Embracing Sustainability in Metrology: From Holistic Measurement to Non-Reagent Techniques"
12:10 – 12:30 Stefan Zürcher
AP&S International GmbH
"Reduced time to production after equipment delivery"
12:30 – 13:30 Lunch, networking & trade fair
13:30 – 13:50 Dario Tenaglia
STMicroelectronics srl
"Brazable metal full wet etch process optimization on SiC"
13:50 – 14:10 Dr. Ina Haxhiaj
TDK-Micronas GmbH
"Customer specified optimization of a SpinStep tool for etching processes"
14:10 – 14:30 Jérôme Daviot, Ph.D.
Technic France
"New generation of wet process chemicals: How to plan sustainability in wet surface preparation through joined developments"
14:30 – 14:50 Ole Gerkensmeyer
Nexperia
"Outlook for a bright electrified future in Europe: "circular economy in (power) semiconductors"
14:50 – 15:10 Tobias Bausch & Simon Gräfner, Ph.D.
AP&S International GmbH
"Modular high-throughput wetbench with enhanced performance"
15:10 – 15:40 Break, networking & trade fair
15:40 – 16:00 Carmine Sileno
Meister Abrasives AG
"Precision Grinding of Semiconductors"
16:00 – 16:20 Igor Eichinger
Product Systems Inc.
"Precision Megasonics in wet chemical surface preparation - SOUND'S GOOD"
16:20 – 16:40 Reto Salzmann
SIMONA AG
"No Thermoplastics. No Semiconductors: FM4910 Plastics - The Future of Semiconductor Safety"
16:40 – 17:00 Award
17:00 – 17:15 Summary

 

Thursday, March 27, 2025

Schützen "Spiegelsaal", Donaueschingen

19:00 Gala Dinner "Casino Royale"

Friday, March 28, 2025

AP&S, Donaueschingen (Aasen) - WERK I

08:15 – 09:00 Group division, welcome greeting
09:00 – 10:20 Production tour
10:20- 10:50 Break & Networking
10:50 – 12:30 Production tour
12:30 – 14:00 Closing with AP&S & lunch

 

SECURE YOUR TICKET NOW!

 

Participation fee for the multi-day event:
290 Euro net per person

Including lectures with top-class speakers, insights into AP&S production, supporting program with refreshments. (Overnight stay not included).

Speakers

Lectures

AP&S International GmbH

Stefan Zürcher

Head of Process Technology

Reduced time to production after equipment delivery

In current times with shortages of semiconductors, ramp-up of production capacities becomes globally more important than in former times. AP&S implemented an in-house facility and strategy to significantly reduce leaching times of new installed wet process equipment and thus speed-up the availability for production. Efficient rinsing of every equipment by ultra-high-purity water ensures a reliable cleanliness and quality of the equipments before shipment. Quality monitoring before delivery is done by optical laser counters and different analytics.
By having implemented and continuously optimized the tool purge procedure, a pre-qualification of wet process equipment prior to delivery is possible which also allows a reduced time to production after tool installation in customer fabs.
Benefits of this strategy for our customers will be part of the presentation.

AP&S International GmbH

Tobias Bausch

CMO & CTO

 

Simon Gräfner, Ph.D.

Process / Simulation Engineering

Modular high-throughput wetbench with enhanced performance

The trend of wet cleaning processes is pointing towards enhanced performance and high throughput by increasing the automation and productivity of batch tools. The NexAStep, the next generation of wet processing, was developed to meet the demands and goals of the rapidly evolving semiconductor industry.

The NexAStep combines automated and modular hardware with a cutting-edge software. A particular highlight is the robot cell with its connection to the OHT, several storage locations, wafer handling, LMC buffer station and other additional outstanding features. Furthermore, the NexAStep exhibits an outstanding throughput, e.g., by reducing process times by applying higher process temperatures, new features for hydrodynamics or higher flow rates for reduced rinsing times.

The production capabilities and performance are demonstrated by analyzing different sequences of the hot Phos, SPM, HF, RCA clean and Marangoni drying processes. Measurements of various performance parameters such as particles, etch rates as well as cleaning efficiency, were among the methods used to examine the accomplishments even of strict specification requirements.

Fabmatics GmbH

Jan Klinger

VP Sales & Business Development

Automating Legacy Semiconductor Fabs - Lifespan Expansion Made in Saxony

Legacy fabs are semiconductor factories that produce chips using older process nodes and technologies. They were often built in the 1980s or 1990s and utilize less advanced manufacturing processes compared to factories that produce the latest generations of semiconductors.

While modern fabs running fully automated to process 300 mm wafers and focus top notch technologies such as 7 nm, 5 nm or smaller - legacy factories typically operate in manual fashion with larger feature sizes of 65 nm, 90 nm, or even 250 nm and on wafer sizes of 200 mm or smaller.

In recent decades, semiconductor manufacturing has significantly shifted from the USA and Europe to Asia, particularly to China, Taiwan and South Korea.

This trend is currently reversing to some extent, driven by geopolitical influences and the local-for-focal tendency. For the legacy fabs considered here, these changing conditions present an opportunity for a 'revival or second life'. A key requirement for this is the increase in efficiency to maintain the competitiveness of the fabs.

One of the biggest levers to achieve this is modernization through material handling automation...

Fraunhofer Institute for Silicon Technology (ISIT)

Dr. Niels Clausen

Research Assistant MEMS Applications I Agglomerated Microsystems

Dual-Purpose Spinscrubber System for Surface Cleaning and ALD Penetration Assessment in PowderMEMS process

At Fraunhofer ISIT, we have developed a novel technique called PowderMEMS. This process involves agglomerating loose particles filled in etched cavities into rigid 3D structures using atomic layer deposition (ALD). During the filling process, silicon wafers with etched cavities are filled with powder materials using a semi-automatic powder-filling tool. The excess material from the surface is then removed using a squeegee. However, residual particles remain on the wafer surface and at the edges on the backside, which can contaminate cleanroom equipment if transferred.

We utilize the AP&S SpinScrubber to prevent such contamination by removal of the residual particles from the wafer surface. This cleaning process employs soft brushes and high-pressure cleaning to effectively remove residual particles, ensuring that the wafers are clean and suitable for further processing without compromising the cleanliness of the tools.

In addition to cleaning, the high-pressure cleaning function also serves a characterization role. It helps determine if the agglomeration has reached the bottom of the cavities. By using high-pressure cleaning to remove the agglomerate structures and then performing XeF2 etching, we can verify the completeness of the ALD coating. If the ALD layer has coated the bottom of the cavity, the silicon will resist etching by XeF2 gas. Conversely, the silicon will be etched if the ALD does not reach the bottom. We perform image analysis using AI to evaluate which cavities were fully coated and which were not, helping us optimize the precursor amount needed to achieve complete coating.

Fraunhofer Institute for Silicon Technology (ISIT) &
X-FAB Semiconductor Foundries AG
 

Dr. Simon Fichtner

Director of Science and Technology, MEMS Applications

Christopher Kutzner

Process Engineer

Wet etching of AlScN films with high Sc-content for piezo-MEMS applications

Piezoelectric micro-electromechanical systems (piezo-MEMS) are increasingly complementing and substituting electrostatic MEMS. Due to significantly improved power densities as well as increased design freedom, new applications in the field of high-force actuators such as printheads or microspeakers have become possible. As of now, however, the full impact of piezo-MEMS has been held back by the commercially available thin-film piezoelectrics. Compounds like lead-zirconate-titanate (PZT), next to their toxicity, pose a formidable integration challenge, whereas easier to integrate compounds such as AlN do not provide sufficient force.

Therefore, X-FAB and Fraunhofer ISIT are working on implementing AlScN as the next generation of piezoelectric thin films - which combine high power output with a significantly improved integrability. Progressively increasing scandium (Sc) contents have allowed to reach higher and higher forces over the last years, yet a lack of volatile Sc reaction products is hindering the implementation of selective dry etching procedures for ScN concentrations ≥ 30%. Wet etching in turn allows batch processing with high selectivity against e.g. electrode layers for arbitrarily high Sc concentrations.

This contribution will give an overview of the capabilities that wet etching offers in the context of selective patterning of AlScN films with up to 2 µm thickness and ScN contents up to 40% - starting from lab-scale experiments to production suitable high throughput equipment from AP&S.

Levitronix GmbH

Gabriel Park

Senior Technical Consultant

Reducing Variations in Process Chamber Pressure by Actively Controlling Exhaust

Effective exhaust pressure control is critical for maintaining wafer quality in semiconductor wet applications, where hazardous gases are generated during processing. Traditional methods, such as butterfly valves, face challenges in delivering precise and dynamic pressure regulation, often leading to issues like chamber cross-talking, pressure fluctuations, and insufficient exhaust flow during tool expansions or chemical buildup.

Innovative exhaust management approaches utilizing advanced technologies now enable precise control of pressure and flow, significantly reducing particle contamination on wafers. These solutions offer faster stabilization times, greater accuracy, and improved adaptability to dynamic process demands. Additionally, they ensure compact design, high power density, and robust chemical resistance, providing reliable operation in demanding environments. Comparative analyses demonstrate enhanced performance in pressure control, disturbance response, and process consistency, paving the way for improved efficiency and yield in semiconductor manufacturing processes.

Logo Max Planck Society
Dr. Florian Schopper

Max Planck Society for the Advancement of Science e.V.

Dr. Florian Schopper

Head of Technology

Wet chemical spinetch tool for structuring, stripping and cleaning of doubleside polished silicon wafers

This lecture provides an overview of the production of radiation detectors at the Semiconductor Laboratory of the Max Planck Institute in Garching. The different types of detectors manufactured at the HLL and their applications will be presented. The individual process steps will then be explained, with a particular focus on the challenges involved in processing wafers structured on both sides. In addition, the new wet etching system from AP&S will be presented, which enables one-sided processing of the wafers without damaging the backside. Finally, the chemicals used and the planned processes will be described.

Logo Max Planck Society

MKS | Atotech

Dr. Stefan Pieper

Team Manager Global Application - BU SFC

Electroless metallization for power semiconductor devices

In today's world with its increasing demand in power semiconductor devices for electrification, e-mobility and enabling the flexible use of green energy it has become more and more imminent that it is not only necessary to involve new semiconductor materials (e.g. SiC, GaN) but also apply alternative manufacturing technologies to maintain the flexibility and reliability on the next generation of power semiconductor devices.

Electroless metallization processes from MKS are part of these alternative technologies for power semiconductor device manufacturing and have been established in the industry over past 15 years with their benefit of providing maskless metallization with higher throughput capability at a reduced Cost of Ownership compared to physical metallization techniques. Usually, electroless processes are being used as final finish on Cu or Al-based substrates but there is also the possibility of direct metallization of semiconductor material (e.g. Si, SiC, GaN) using the electroless processes and create a reliable low ohmic contact.

MKS Instruments Germany GmbH

Dr. Anina Barth

Senior Principal Scientist

Dissolved Gases - Cleaning and specialty applications in semiconductor manufacturing

Wet cleaning is a major part of the semiconductor manufacturing process and is becoming a more critical process with continued node scaling in Logic and Memory. Lithography, deposition steps and epitaxial growth of semiconductor layers cannot be successfully operated without proper pre- and post-cleaning steps. Traditional cleaning processes are based on water or other solvents and wet cleaning has been a standard for a very long time. The challenge today is developing wet cleaning processes that fit the needs of the advanced semiconductor processes with structures heading towards the sub-nanometer area. This paper will provide an overview of the cleaning mechanisms for dissolved gases, along with common applications.

Dissolved gases like dissolved ozone / DiO3, dissolved ammonia / DiNH3 or dissolved carbon dioxide / DiCO2, as provided by MKS Instruments, have been used for cleaning purposes for over 20 years. The unique setup in dissolving a gas in ultrapure water allows for strict contamination control of the cleaning liquid, a prerequisite for successful cleaning of a silicon semiconductor wafer or other surfaces like glass and metals.

Main applications for dissolved gases are:

  • Surface Cleaning (DiO3, DiNH3)
  • Oxide Growth (DiO3)
  • Controlled Etch or trimming (DiO3, DiNH3)
  • Rinsing (DiCO2, DiNH3)
  • Photoresist stripping (DiO3)
  • Post-CMP and post-grinding cleans (DiO3)

Ozone is a strong oxidizer and is used as a standard for surface cleaning on Silicon in the sequence DiO3 + HF; at medium DiO3 concentrations of 10 - 50 ppm, a silicon oxide layer is formed and subsequently removed to clean the surface from particles, organics and other contaminants. DiO3 for removal of organics is the main application for dissolved ozone in semiconductor manufacturing.

DiO3 alone is used to create very thin oxide layers of 0.4 - 1.2 nm on silicon. These SiO2 layer are widely used in semiconductor manufacturing as protection layer, to shield the semiconductor surface, for conditioning, to create hydrophilic surfaces and as interfacial layer in 2D and 3D device structures.

 The very first application for DiO3 was in Photoresist (PR) strip. Where 60 - 100 ppm DiO3 was used in the beginning of the 2000thdue to recent developments, MKS Instruments offers DiO3 concentrations up to 200 ppm for effective stripping of PR layers during lithography.

In the medium concentration range, also other DiO3 applications emerged: post-CMP (Chemical-Mechanical Polishing) or post-grinding at 3 - 30 ppm DiO3 is a very effective cleaning process after planarization of surfaces.

Next to DiO3i.e. Dissolved Ammonia / DiNH3 and Dissolved Carbon Dioxide / DiCO2 are widely used dissolved gases in semiconductor manufacturing. The main application of both, DiNH3 and CO2 is ESD prevention in rinsing processes; ESD is electrostatic discharge that can be observed when small semiconductor structures are rinsed with ultrapure water. Due to the high resistance of UPW, arcing can occur, and structure are destroyed during the rinsing process. DiNH3 and DiCO2 in low concentrations will prevent arcing.

Finally, DiO3 or DiNH3, at very low concentration, are used for wet specialty etches and trimming processes in semiconductor but also in photomask manufacturing.

In summary, all three gases dissolved in ultrapure water can be used for standard cleaning and rinsing applications but also for specialties like etching and oxidation. Single wafer cleaning applications are a standard but also batch processes are widely used. Dissolved ammonia and dissolved carbon dioxide are essential for cleaning of small structures in semiconductor manufacturing. Dissolved ozone is a powerful green alternative to oxidizers like sulfuric acid or hydrogen peroxide. Traditional applications in oxide growth, photoresist stripping and surface cleaning in advanced nodes will now be extended into new applications on the wafer backside and advanced packaging.

MKS Instruments follows the trend of green initiatives to save resources like energy and water. For DiO3, a reclaim system was developed to save resources during process brakes and to lower the overall carbon footprint of the process.

MKS has a 25-year-experience in Dissolved Gases business and an install base of around 3.000 systems globally; the product family of the DiO3 delivery system, the LIQUOZON, has the biggest share. The heart of the DiO3 system is MKS's powerful ozone gas generator. MKS offers a variable platform for dissolved ozone and ammonia systems with a high level of customization that secures MKS's position as the market leader in cleaning applications with dissolved gases in semiconductor manufacturing.

Nexperia

Ole Gerkensmeyer

Vice President EMEA Sales
PCIM Conference Advisory Board Member

Outlook for a bright electrified future in Europe: "circular economy in (power) semiconductors"

This paper provides an in-depth analysis of global power consumption, the proportion attributable to electric power, and its projected future development. This discussion is contextualized with the growing waste stream of obsolete electronic equipment, highlighting the partial efficacy of current recycling practices in mitigating environmental toxicity. The paper also explores EU regulations and recommendations promoting circular economy principles as a strategy to reduce electronic waste and suggests innovative approaches for the design of power electronic circuits conducive to a circular economy.

#### Introduction

Global primary energy consumption was approximately 160 TWh in 2022, with electric energy consumption accounting for around 30 TWh. Electric power consumption has exhibited a compound annual growth rate (CAGR) of approximately 3% over the past 120 years, since the early 1900s. Currently, this consumption is segmented into four main sectors: residential, transportation, industrial, and commercial.

#### Future Demand Drivers

Projected demand drivers suggest a significant increase in electric energy consumption, estimated to exceed 12 PWh per year by 2030. Key contributors to this growth include:

- Data centers, artificial intelligence, air conditioning, and household appliances, contributing over 6 PWh per year.

- Growing demands in marine, trucking, aviation, and charging infrastructure, exceeding 2 PWh per year.

- Industrial electrification, digitalization, urbanization, energy storage, and grid expansion, totaling over 3 PWh per year.

- Building electrification and renewables integration, adding another 2 PWh per year.

#### Electronic Waste and Recycling

This anticipated growth in electric energy demand is compounded by the current electronic waste stream, which exceeds 64 million tons per year (UNTAR report: e-waste monitor 2024). The United Nations predicts that this e-waste will remain the world's fastest-growing waste stream, with a significant environmental impact due to incomplete recycling of toxic materials such as mercury and bromine. Alarmingly, the UN forecasts that the recycling rate will decline from 22.3% in 2022 to below 20% by 2030.

#### EU Regulatory Framework

The European Union's Green Deal 2050 has identified electronic waste (exceeding 16 kg per person in 2022) as a critical area for action. The EU explicitly advocates for circular economy initiatives in electronics, as evidenced by the recent "right to repair" legislation.

#### Innovation in semiconductor design

Historically, electronic circuit design, including power electronics, has followed a "throw-away" mentality, focusing on single-application use. Transitioning to a circular economy necessitates redesigning electronic circuits to accommodate multiple applications. Key considerations include:

- Reliability:** Ensuring long-term performance across different applications.

- **Health Monitoring:** Incorporating systems to monitor component health.

- Component Aging:** Understanding and mitigating the effects of aging components.

- **Documentation:** Comprehensive documentation for maintenance and reuse.

- Licensing:** Clear licensing to facilitate component repurposing.

- Software Analysis:** Advanced software tools for analysis and validation.

- **User Education:** Educating users on the benefits and practices of circular economy principles.

#### Conclusion

The transition to a circular economy in power electronics presents both challenges and opportunities. By embracing innovative design approaches and adhering to regulatory frameworks, the industry can significantly reduce its environmental footprint while meeting the growing demand for electric power.

Nova Ltd

Dr. Andreas Möller

Product Line Manager

Embracing Sustainability in Metrology: From Holistic Measurement to Non-Reagent Techniques

As we confront the escalating global environmental challenges, the significance of sustainability is becoming increasingly critical across all industries. In particular, the semiconductor industry feels this urgency and is striving for more sustainable practices. This presentation will shed light on the innovative strategies that are driving this shift towards sustainability. It will explore how chemical metrology is evolving to support and meet these demands, ensuring greener and more sustainable processes.

We will discuss how measurement strategies can extend the lifetime of chemical baths while ensuring high-yield production and reducing waste. This approach not only improves efficiency but also contributes to sustainability.

We'll also discuss direct metal replenishment, a method for reducing bleed-and-feed volumes in copper and tin plating, optimizing resource use. It ensures continuous metal supply, minimizing anode changes and down-time, enhancing productivity and cost savings, which becomes essential with the continuous growth of Advanced Packaging applications.

The presentation additionally emphasizes non-reagent techniques in chemical metrology and process control. These techniques aim to decrease chemical usage, promoting sustainable practices. They utilize advanced technologies to achieve accurate results without extensive chemical use, reducing environmental impact and costs. In process control, reduced chemical usage leads to safer operations, minimizes risk of accidents, and provides faster, real-time control, improving overall efficiency.

In conclusion, this presentation highlights the need for sustainability in the semiconductor industry through innovative strategies. We explore holistic measurement strategies, direct metal replenishment, and non-reagent techniques that enhance efficiency, reduce environmental impact, and promote safer operations.

STMicroelectronics srl

Dario Tenaglia

Senior Process Development Engineer

Brazable metal full wet etch process optimization on SiC

The wet etch process of the brasable metal stack (Ti/Ni/Ag) on SiC power MOSFET devices has been implemented as a full wet approach in our Spin Step tool including the resist removal. Metal residues have been observed by SEM inspection on the polyimide surface, the Auger analysis detected the presence of nickel. A more effective cleaning was necessary to remove the nickel, tuning the steps of the recipe good result was observed with the SC1 before the Ti etch.

Dr. Ina Haxhiaj

TDK-Micronas GmbH

Dr. Ina Haxhiaj

Process Engineer

Customer specified optimization of a SpinStep tool for etching processes
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Technic France

Jérôme Daviot, Ph.D.

Director Technology & Innovation

New generation of wet process chemicals: How to plan sustainability in wet surface preparation through joined developments

To tackle the complexities of the European integrated circuit (IC) landscape-including process diversity, raw material availability, stringent environmental targets, and evolving regulations - a systemic approach is essential when designing new surface preparation processes.

Building on the success of collaborative initiatives, including French & European consortia and partnerships with research and technology organizations (RTOs), equipment suppliers and end-users, these efforts have created opportunities for near real-time industrial research and experimental validation in representative environments.

Through these joint developments, process benchmarking, life cycle analysis, and risk assessments, these efforts have demonstrated how advanced surface preparation processes can be optimized to reduce development cycle time, costs and risks for end-users. Furthermore, they have provided valuable insights into key parameters such as health, safety, and environmental (HSE) considerations, energy efficiency, raw material resilience, and waste management supporting the transition to more sustainable and efficient semiconductor manufacturing practices.

Few examples of successful outcomes including the development of TMAH- and NMP-free strippers, catechol/hydroxylamine-free post-etch residue (PER) cleaners, and bioaccumulative free chelators& surfactants for metal etchants will be presented.

Company presentations

Meister Abrasives AG

Carmine Sileno

Senior Product Manager Semiconductors

Precision Grinding of Semiconductors

Hybrid and vitrified bond grinding tools represent a quantum leap in quality and reliability in semiconductor processing. Meister Abrasives' diamond grinding tools target boule, puck, seed, and wafer grinding. With a best-in-class total topography (Sa, Sz, Bow, Warp, TTV), surface qualities in the one-digit Angstrom range are achieved. The specially developed grinding tools of Meister Abrasives are used for processing a wide range of materials such as silicon carbide (SiC),poly silicon carbide(pSiC), silicon (Si).

Meister Abrasives' innovative grinding wheel technologies allow prime wafer and device manufacturers to shorten wafer preparation steps to the minimum. For example, the ultra-smooth surface profile achieved by the UF6 DIA technology enables manufacturers to avoid diamond slurry costs, reduce chemical mechanical polishing (CMP) cost tremendously and drastically increase throughput.

Product Systems Inc.

Igor Eichinger

Sales Director North America & Europe

Precision Megasonics in wet chemical surface preparation - SOUND'S GOOD

Semiconductor fabs and equipment suppliers often face challenges in keeping up with the increasingly stringent requirements of cleaning processes. However, a deeper understanding of the physical and sonochemical phenomena in megasonic processing can significantly aid in optimizing processes, improving cleaning efficiency, and ensuring reproducible results.

This presentation not only sheds light on the behavior of sonicated fluids but also debunks enduring myths surrounding megasonic cleaning technologies, providing clearer insights into the true capabilities of this future-proof technology.

ProSys

SIMONA AG

Reto Salzmann

Market Segment Manager Semicon
Business Line Industry

No Thermoplastics. No Semiconductors: FM4910 Plastics - The Future of Semiconductor Safety

The presentation highlights FM4910-certified plastics as a game-changer for semiconductor safety, replacing traditional thermoplastics and semiconductors in critical environments. Thermoplastics are a crucial part of cleanroom equipment (e.g. wet benches including chemical process tanks) and inevitable to use. FM4910 approved thermoplastics go one step further and offer superior fire resistance, low smoke generation, and chemical durability, making them ideal for wet process equipment in cleanrooms. By eliminating the risks associated with thermoplastics, FM4910 plastics enhance operational safety and compliance with stringent industry standards. Their adoption represents a significant step towards safer, more reliable semiconductor production processes.

ProSys

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Hotels

Comfort and style in a prime location reserved

We have gladly reserved rooms in hotels near the venues.
Please enquire there about the room types and prices on offer and book your rooms yourself.

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Hotel Sombea